Primary Topologies of SPI, I²C, CAN, UART, and USART


The primary topologies for SPI, I²C, CAN, UART, and USART

are fundamentally defined by how they manage device addressing and communication flow.

  • SPI (Serial Peripheral Interface): Star Topology (Single Master, Multiple Slaves). The master controls individual chip select (CS) lines for each slave.
  • I²C (Inter-Integrated Circuit): Bus Topology (Multi-master or Multi-slave). All devices are connected in parallel to the same two wires (SDA and SCL).
  • CAN Bus (Controller Area Network): Linear Bus Topology. All nodes are connected to a single, main trunk line with two termination resistors at the ends.
  • UART (Universal Asynchronous Receiver/Transmitter): Point-to-Point Topology. It typically connects only two devices directly (one transmitter to one receiver).
  • USART (Universal Synchronous/Asynchronous Receiver/Transmitter): Point-to-Point Topology. It behaves like UART, with an optional added clock line, usually forming a direct 1-to-1 connection. 

Detailed Breakdown

Protocol Primary Topology Key Characteristic Typical Application
SPI Star Dedicated Chip Select (CS/SS) for each device High-speed, short distance (SD cards, displays)
I²C Bus Shared 2-wire bus, device addressing Many low-speed sensors, EEPROMs
CAN Linear Bus Two-wire differential bus, multi-master Automotive, industrial, noisy environments
UART Point-to-Point  2-wire dedicated link (TX/RX) Debugging, MCU-to-Module communication
USART Point-to-Point Synchronous or Asynchronous, 1-to-1 MCU-to-MCU, high-speed serial

Topology Notes:

  • SPI Daisy-Chain: SPI can also be configured in a daisy-chain topology, where data moves from one device to the next rather than directly from the master.
  • CAN Stubs: While linear is the standard, small stub lines (drop lines) can be used to connect devices, but these should be kept minimal to prevent signal reflection.

Post a Comment